1. Field of the Invention
The present invention relates to an optical disk reproduction apparatus such as a CD (compact disk) and, more specifically, to a data slice circuit of a reproduction apparatus capable of continuously varying a reproduction speed.
2. Description of the Related Art
A digital recording/reproduction system is now under development in the field of sound equipment. In this system, in order to record/reproduce a signal with high density and high reliability, an audio signal is converted into a digital signal by the PCM (pulse code modulation) technique, and the digital signal is recorded on a disk, a magnetic tape, or the like and reproduced therefrom. At present, a CD 12 cm in diameter, on which a bit sequence corresponding to digital data is formed and from which the bit sequence is optically read out, is the most popular.
The CD mainly stores 16-bit PCM data (main data) of an analog audio signal. The digital data is stored in the CD by repeating one frame constituted of 24 symbols each having 8 bits. The CD employs a CIRC (cross interleave reed-solomon code) as an error correction code.
More specifically, the digital data of 24 symbols is supplied to a C2 encoder to generate a C2-sequence error correcting parity symbol Q of 4 symbols. Both the digital data and parity symbol Q are supplied to a C1 encoder via an interleave circuit to generate C1-sequence error correcting parity symbol P of 4 symbols. 32-symbol data constituted of 24-symbol digital data, 4-symbol parity symbol P and 4-symbol parity symbol Q receives subcode data of 8 bits (one symbol). The subcode data and 32-symbol data are modulated by EFM (eight to fourteen modulation). Then a margin bit of 3 extra bits is added between 14-bit symbols of the modulated data, and a 24-bit synchronization pattern is added to the head of the bit sequence. Thus, 588-bit data is recorded on the disk as one frame. Since, in this case, the channel bit frequency is 4.32 MHz, the data of one frame is recorded on the disk in 136 .mu.sec (at a frequency of 7.35 KHz). One subcode block consists of 98 subcode frames, and data of one subcode frame is recorded on the disk at a frequency of 75 Hz (10.3 msec).
A disk reproduction apparatus for reproducing data from the CD mentioned above rotates the CD at a CLV (constant linear velocity) by a motor and a motor control circuit. An optical pickup device including a semiconductor laser, a photoelectric transducer, etc. reads data recorded on the CD by linearly tracking the disk from the inner circumference to the outer one. The read data (current signal) is supplied to an amplifier. The amplifier converts the current signal into a wideband signal (hereinafter referred to as RF signal) as a voltage signal and supplies it to a data slice circuit. The data slice circuit binarizes the RF signal and supplies it, as an EFM signal, to a PLL (phase locked loop) circuit and a data processing circuit. The data processing circuit separates a synchronization signal from the EFM signal and EFM-demodulates the remaining signal into data components of 32 symbols including parity symbols P and Q and subcode data components. The EFM-demodulated data is written to a memory of the data processing circuit in response to a clock signal generated from the PLL circuit. The data of the memory is read out in response to a quartz system reference clock signal generated using a quartz oscillator, and a jitter (variation of time axis) due to the motor is absorbed. The data read out from the memory, an error of which has been corrected, is output as 16-bit digital data.
The reproduction speed is varied by a system controller. The system controller generates a reproduction speed control signal (hereinafter referred to as HS signal). The HS signal designates, for example, a normal reproduction speed (referred to as equal speed) or a speed two times as high as the reference speed (referred to as two-times higher speed). The HS signal is supplied to the data processing circuit and motor control circuit in order to switch a processing speed or a disk reproduction speed to a desired speed. The data slice circuit receives the HS signal and varies a control frequency band in accordance with the reproduction speed.
Since the disk normally rotates at the CLV, its angular velocity is 500 rpm when the inner circumference of the disk is accessed, and it is 200 rpm when the outer circumference thereof is accessed. It is thus necessary to decrease the rotation speed of the motor to half or less when data on the inner circumference is reproduced after the outer circumference is searched. On the contrary, it is necessary to increase it twice or more when the inner circumference is searched after data on the outer circumference is reproduced.
A CD-ROM has lately attracted considerable attention as a digital recording/reproduction system. The CD-ROM mixedly stores audio signals and ROM data such as image information and character codes. When the audio signals are read out of the CD-ROM, the disk is rotated at an equal speed to reproduce data thereon. When the ROM data is read out, it is rotated at, e.g., a two-times higher speed in order to read it as fast as possible.
As described above, when data of the CD or CD-ROM is reproduced, the reproduction speed has to be switched frequently from the equal speed to the two-times higher speed or from the two-times higher speed to the equal speed. When the reproduction speed is switched, data cannot be reproduced stably before the rotation speed of the disk becomes constant, and the reproduction is thus intermitted. The intermittence of the reproduction due to the switching of the speed greatly reduces the performance of the reproduction apparatus. The performance can be improved by using a high-performance motor; however, in this case, the cost is greatly increased.
In the conventional disk reproduction apparatus described above, the reproduction speed does not vary continuously, but the two reproduction speeds of, e.g., the equal speed and two-times higher speed are switched discontinuously. The data slice circuit thus switches the control frequency band in accordance with the two reproduction speeds. More specifically, the conventional data slice circuit converts an input RF signal, which is compared with a reference voltage by a comparator, into binary data. An up-down counter counts a time period of binary data "0" and that of binary data "1" and outputs differential data indicative of a difference between the time periods.
The count clock of the up-down counter is a clock signal generated from the quartz system reference clock signal. The clock signal has a frequency which optimizes the control frequency band of the reference voltage of the data slice circuit. When the reproduction speed is an equal speed, the clock signal is supplied to the up-down counter. When the speed is a two-times higher speed, a clock signal whose frequency is twice as high as that of the clock signal is supplied to the up-down counter.
The differential data output from the up-down counter is sent to a digital-to-analog converter. The digital-to-analog converter converts the differential data into an analog voltage and feeds it back to the comparator as a reference voltage. The comparator binarizes the RF signal by the reference voltage such that a time period of data "0" and that of data "1" are equalized to each other.
The data slice circuit feeds back the result of count in such a manner that the time periods of data "1" and data "0" become equal to each other. If the frequency band of the feedback loop is too low, there is a flaw in the disk. If the amplitude of the RF signal is changed, the slice level cannot follow the amplitude. If the frequency band of the feedback loop is too high to the contrary, the slice level varies with the amplitude of the minute RF signal, and the jitter of the EFM signal increases after data is sliced. Therefore, the frequency division ratio of the clock signal has to be regulated such that the frequency band of the loop is optimized.
However, the control frequency band of the data slice circuit can be changed to only the two stages, as described above. For this reason, when the reproduction speed is varied continuously, the characteristics cannot be conformed with all the reproduction speeds and consequently the reproduction performance cannot be kept constant with respect to every reproduction speed.